MCQ1 mark
Which one of the following CPU scheduling algorithms cannot be preemptive?
Single correct
GATE CSE previous year questions · Operating Systems
Single correct
Wait(A);
Print(*);
X = X+1;
If (X == 2)
{
Print($);
Signal(B);
}
Signal(A);
Wait(B);
Print(#);
Signal(B);
Assume that any of the three processes can start to execute first and context switching can happen between these processes at any arbitrary time and in any arbitrary order.
Which of the following patterns is/are possible to be generated as an outcome of the execution of these three processes?One or more correct
Numerical answer
Numerical answer
Numerical answer
Single correct
One or more correct
One or more correct
Numerical answer
One or more correct
One or more correct
Single correct
// code of T1 // code of T2
wait(s1); wait(s1);
x = x+1; x = x+1;
print(x); print(x);
wait(s2); signal(s2);
signal(s1); signal(s1);
Which of the following outcomes is/are possible when threads T1 and T2 execute concurrently?One or more correct
Numerical answer
Numerical answer
One or more correct
Answer key coming soon
int x = 0; // global
Lock L1; // global
main() {
create a thread to execute foo(); // Thread T1
create a thread to execute foo(); // Thread T2
wait for the two threads to finish execution;
print (x);}
foo() {
int y = 0;
Acquire L1;
x = x + 1;
y = y + 1;
Release L1;
print (y);}
Which of the following statement(s) is/are correct?One or more correct
Answer key coming soon
function OwnResource(Resource R)
Acquire lock L // a global lock
if R is available then
Acquire R
Release lock L
else
if R is owned by another process P then
Terminate P, after releasing all resources owned by P
Acquire R
Restart P
Release lock L
end if
end if
end function
Which of the following choice(s) about the above scheme is/are correct?One or more correct
Answer key coming soon
<-------------- 39-bit virtual address -------------->
----------------------------------------------------
| Level 1 | Level 2 | Level 3 | Page |
| offset | offset | offset | offset |
|__________|__________|__________|____________|
9 bits 9 bits 9 bits 12 bits
The page size is 4KB (1KB bytes) and page table entry size at every level is 8 bytes. A process is currently using 2GB (1GB bytes) virtual memory which is mapped to 2GB of physical memory. The minimum amount of memory required for the page table of across all levels is ________ KB.Numerical answer
Answer key coming soon
Single correct
Answer key coming soon